January 29, 2003
FRONTIERS IN MATERIALS SCIENCE
VINSE COLLOQUIUM SERIES
Dr. Mark Lundstrom
Director, NSF Network for Computational Nanotechnology
Scifres Distinguished Professor
School of Electrical and Computer Engineering
"Nanoscale Transistors: Their physics, technology, and future"
Abstract. As underscored by the recent report of silicon MOSFETs with 6 nm channel lengths, the pace of device scaling continues to accelerate, but the end of device scaling is now only a decade or so away. In this talk, I will discuss the physics of transistors, examine silicon technology at the scaling limit, and speculate on post-CMOS technologies. The talk will begin with a brief description of simulation techniques for molecular scale transistors. Next, I will introduce a simple model that describes the essential physics of nanotransistors. Using detailed simulation results, interpreted according to the simple model, I will examine Si MOSFETs at the scaling limit. The same techniques will then be used to examine alternative transistor technologies, such as strained Si, SiGe, or Ge MOSFETS, Schottky barrier MOSFETs, carbon nanotube MOSFETs, and organic molecule transistors. The talk will conclude with a look at the circuit and system issues that will determine the success of any new device technology.
Short Bio. MARK LUNDSTROM is the Scifres Distinguished Professor of Electrical and Computer Engineering at Purdue University where his teaching and research center on the physics, technology, and simulation of nanoscale electronic devices. He is the director of the NSF-funded Network for Computational Nanotechnology and serves on the leadership councils of the NASA-funded Institute for Nanoelectronics and Computing and the MARCO/DARPA Focus Center for Materials, Structures, and Devices. His research and teaching have been recognized by several awards - most recently the IEEE Cledo Brunetti Award, which he shared with his colleague Supriyo Datta for their contributions to the physics and simulation of nanoscale electronics devices.